Field
Implementations of the present disclosure generally relate to methods for forming gap fill materials on a substrate. More specifically, implementations provided herein relate to a process flow for forming gap fill materials.
Description of the Related Art
In semiconductor processing, devices are being manufactured with continually decreasing feature dimensions. Often, features utilized to manufacture devices at these advanced technology nodes include high aspect ratio structures and it is often necessary to fill gaps between the high aspect ratio structures with a gap fill material, such as an insulating material. Examples where insulating materials are utilized for gap fill applications include shallow trench isolation (STI), inter-metal dielectric layers (ILD), pre-metal dielectrics (PMD), passivation layers, patterning applications, etc. As device geometries shrink and thermal budgets are reduced, void-free filling of high aspect ratio spaces becomes increasingly difficult due to limitations of existing deposition processes.
Gap fill materials may be deposited by various deposition processes, such as flowable chemical vapor deposition (FCVD), spin-on, atomic layer deposition (ALD), plasma enhanced chemical vapor deposition (PECVD), or low pressure chemical vapor deposition (LPCVD). The as-deposited gap fill materials are usually of poor quality, characterized by high wet etch rate ratio (WERR) and high stress. Subsequent processes, such as curing and/or annealing, are performed to improve the quality of the gap fill materials. Even then, the gap fill materials still face several key challenges such as dishing, caused by chemical mechanical polishing (CMP) processes, and nonplanar recess profile.
Therefore, there is a need for improved processes for forming gap fill materials.